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                        Michael Chungkun Chen

Doris Kei-yue Ching

 

32-Bit Variable Time Adder Modeling Tools

Final Report

Abstract

            In this project, we build a Variable Time Adder Modeler using C++ language.  There is a user interface that allow user to create different variable time adder design along with specifying different input delay distribution for each design to be entered into the system.  The system will then model the critical path timing and determine the resulting sum with delay information, and also calculate the time the adder will assert the done signal.  This tool is useful because unlike synchronous adder whose delay depends only on the worse case input, asynchronous adder’s delay is different in each execution and depends on each input distribution.  So the system allows users to design an arbitrary variable time adder that is optimal under a given input specification.  After finishing the modeler and verifying its functionalities, we create various input delay distribution and built various variable time adder design, ran though the system to compare the results and evaluate the different adder type trade off.

 

Introduction

This section presents some background materials on variable time adder drawn from chapter 2 of COMS 252A Digital Arithmetic Textbook [1].  Variable adder can be implemented by any of the basic adder type (such as Carry Ripple, Carry Look Ahead etc) by adding a double-rail coding to the carry in signals so that the circuit have a way to sense when the addition is completed.

When either carry zero or carry one is high will signify the adder has completed adding.

There are two types of Variable time adder, as illustrated below. 

Variable Time Adder Type 1 - Serial Variable Time Adder:

This a basic variable time adder whose delay corresponds to actual carry propagation and critical path gate switching delays through the entire path of the particular input operands.

Variable Time Adder Type 2 – Parallel Variable Time Adder:

The advantage to this scheme is that the addition time is determined by the longest carry propagation and gate switching delay.  However there is an increase in gate delay of calculating the finish signal since in type 2 adder the signal has to go through n-input AND gate.  Also the area would increase with a larger OR-AND network compared to type 1 variable time adder.

            Our modeler will allow user to design a 32-bit serial or parallel variable time adder using the 8 basic adder types presented in the next section and model the resulting delays of the addition and the delays of each of the resulting sum bits.  To model the delay, it uses the gate characteristics of CMOS family from page 108 of the textbook.  Additionally, it assumes a CMOS switch has a switching delay of 0.1ns.

            In our modeler, we allow user to build any arbitrary 2 level adders using the fixed module type the system allow.  The chosen adder types are the basic adder types.  Due to time limitation, we choose to implement only 2 level grouping, additional levels and more adder types could be added to the system in the future (refer to conclusion section). The  4 basic adder blocks are1 bit full adder, 1 bit switch full adder, 2 bit CLA, 4 bit CLA, and the 8 allowed adder types are Carry Ripple, Switched Carry Ripple,  Carry Lookahead (group 2 and 4), Carry Skip, Carry Select, and Conditional Sum adder.  The details of the implementation and delay calculation will be presented in the next section.

 

Implementation

The system is implemented in two parts, the Adder Simulator, and the Graphical User Interface.  The user interface allows for the creation, change, deletion of signals and adders, and also enables us to execute the simulator with selected inputs, outputs, and adders.  We are implementing the system on a windows system, using windows API calls.

A big issue we had was how complicated we wanted to model the signals in our system. 

In a simple model all we would need would be to keep track of average propagation delay of signal from the input to output. 

A very complicated model would propagate the signal through the gates, one input of the gate would change the result to one value, while a little later, the other input would change and the result would change back.  This would cause spikes in the output.  There are many timing cases to worry about, high to low to high, and more possible transitions depending of the number of inputs to the gates, giving us a permutation of the number of inputs.  This was too complex for our project, so we decided on a middle ground.  We would only consider the previous signals and the current signals to determine if the output of a certain gate transitions from high to low, low to high, or stays the same.  If it stays the same we took the latest input signal as the time the output is valid, and if it changes, we would add on the appropriate delay.

The Adder Simulator is implemented on many different levels.  We built the system from a bottom up approach starting at the gate level, then going up to a module level and finally progressing to the system level.  Both serial and parallel variable time adders used the same basic adder modules, so we had to try to make all the modules follow the restriction that serial time adders have, modules should not generate output until they receive valid input.

            The gate level was implemented separately, so two methods can be found.  For the simpler designs, the circuits were analyzed by hand and results were placed into look up tables.  These calculations would include calculating the fan-out based on the equivalent load of each gate on the output.  We then performed the look up for different inputs.  For more complex designs, hand calculation was not feasible, so we modeled a gate level simulator.

            The gate level simulator basically allowed us to connect gates together into a circuit; we would then place the input gates onto a queue, and propagate the signal down to the output.  When all the input signals are not ready for a certain gate, it is placed at the end of the queue to allow other gates to be processed first.  The fan-out of each gate is calculated dynamically during the simulation of the circuit, since the connections of the adder is specified, each gate can detect what load it has to drive.


On a module level we implemented eight basic variable time adder modules.  The basic modules include the Carry Ripple adder, which we often used as a control group.  The Carry Ripple adder is basically a self-timed full adder module.  The output can then be computed with:

si=pi(xor)c1i+1

Building up from the basic module, we implemented the Switched Carry Ripple.  This adder basically contains fast transistor switches, which propagate the carries through to the output.  The Switched Carry Ripple also allows local bits to generate carries of zero or one, reducing carry chains.

The fan-in and fan-out and loads of the Carry Look Ahead adder would greatly vary depending on the number of bits the Look Ahead circuit handles.  So we designed two separate modules for the CLA, giving us a two-bit module and a four-bit module.

Cij=Tij (Cin0 + Cin1)

Cin0, Cin1 are group carry in

 


T10=K0+P0C00

T11=G0+P0C01

T20=(K1+P1K0)+P1P0C00

T21=(G1+P1G0)+P1P0C01


T30=(K2+P2K1+P2P1K0)+P2P1P0C00

T31=(G2+P2G1+P2P1G0)+P2P1P0C01

T40=(K3+P3K2+P3P2K1+P3P2P1K0)+P3P2P1P0C00

T41=(G3+P3G2+P3P2G1+P3P2P1G0)+P3P2P1P0C01


 

The inputs for the G, P, and K signals come from the GPK module.  We had to modify the equations to use the P signal instead of A because for generation of Carry out 0 would be incorrect if we used A.  Due to the nature of CLA adders, it is supposed to generate multiple carry out signals at the same time, but this violates the nature of serial variable time adders, so we decided to implement a compromise.  Each CLA unit must wait for the group carry in before generating output, but the four carry out signals can be generated in any order.  It is not a perfect resolution, but it does help simplify the implementation.

We then created four more adders, which use the basic types as sub adders, basically taking our adder design to two level adders.  We have the Carry Skip Adder, Carry Select Adder, and Conditional Sum Adder.  The Carry Select and Conditional Sum adders both use the Conditional Adder.

Adder Type

Level

Group size Restrictions

Carry Ripple

1

1-32

Switched Carry Ripple

1

1-32

Carry Look Ahead 2 bit

1

2

Carry Look Ahead 4 bit

1

4

Carry Skip

2

Depends on SubAdder

Conditional Adder

1.5

Can not be used by itself

Carry Select

2

Subadder group size

Conditional Sum

2

2X Subadder group size

 

The system level contains a few key aspects.  We have a Variable Time Adder list, which keeps a list of all the different Adders we want to create and add with.  We also have an Operant list which keeps track of all the different signals we use in the program.  These structures let us specify the signals and adders we wished to access, create new ones, or delete them.  The Variable Time Adder list also contains a flag, which specifies if we want to operate the adders in serial or parallel mode.

The GUI has basically three main dialogs.  The Signal editor dialog allows for the user to change the value they want the signal to be, this is input in decimal.  The option to change the bit size, and the time each bit becomes valid is also available.

Following the Signal editor dialog, we have a general Adder builder dialog.  This adder builder allows for different chains of adders to be created or modified.  Here we can specify the Primary Adder Types, and Secondary types, and the number of bits we want this adder module to be.  We can also specify the overall behavior of the chain as a serial adder or a parallel one.

The execution dialog is where it all comes together.  You can select two previously created signals to feed into an adder you built previously, and output the resulting signal into an empty signal you created.

Verification

            Since our implementation was broken up into gate level, module level, and system level, our testing also run across the three levels.  Extensive testing was performed on the gate level basic blocks unit of one bit full adder; switch full adder, 2 bits carrylookahead and 4 bits carrylookahead.  Input signals were set with different delay values, and output carries and sum signals are monitored to make sure delay values are within reasonable value.

On the module level, we generate a list of random number as the operant signals and run it through each of the 8 possible adder type.  Carryout delays are monitored as it propagates through each basic block unit to verify the correctness.  Each of the 32 bit sum signal are verified to see if the delay is within reasonable bound, and the final sum signal is checked to see if it is the same as the actual addition result.

On the system level relies on the fact that since the adder building blocks are thoroughly tested and the delays value should be correct.  Testing is performed by mixing different adder types to build Serial and Parallel variable time adder and monitoring the resulting sum to make sure each adder blocks are connected correctly and no errors are generated. 

 

Evaluation

            To analyze how input distribution and type affect the delays of different variable time adder designs, we generated different adder designs and model the delay with different input operands of different arrival time distribution.  Specifically, the following table listed the input operands used for evaluation.

Operant 1

Operant 2

Description

-1

0

propagation chain of 32 bits

-1

1

g at 0, then propagate

-1

32768

g at middle, then propagate

-1

2147483648

g at last bit , then propagate

0

0

kill all 32 bits

-1

-1

gen all 32 bits

-2073004001

-2002001901

random

1254367385

1398963295

random

2578460

352391447

random

-1349512601

1357364521

random

 

There are four types of input distribution used in the studies.

The different adder designs we considered in our evaluation and comparison are listed as follow:

 

Serial Variable Time Adder

 

Parallel Variable Time Adder

group size

adder type

 

 

0

CR   (32 bits)

 

 

0

SCR (32 bits)

 

 

2

CLA2

2

CLA2

4

CLA4

4

CLA4

 

 

 

group size of (2,4,8,16)

CarrySkip (CR)

 

group size of (2,4,8,16)

CarrySkip (CR)

CarrySkip (SCR)

CarrySkip (SCR)

CarrySkip (CLA)

CarrySkip (CLA)

CarrySelect (CR)

CarrySelect (CR)

CarrySelect (SCR)

CarrySelect (SCR)

CarrySelect (CLA)

CarrySelect (CLA)

ConditionalSum (CR)

ConditionalSum (CR)

ConditionalSum (SCR)

ConditionalSum (SCR)

ConditionalSum (CLA)

ConditionalSum (CLA)

 

The resulting delay of each combination of input distribution, adder design, and operands are attached in the appendix at the end of the report.

 

Some interesting observation drawn from the resulting delays numbers:

  1. On average, 32-bits Carry ripple adder perform better than CarryLookAhead adder because the variable time adder circuit is much simper and carry propagate only have one NAND gate delay; whereas in variable time CLA, the circuit is much complicated, the carry propagate delay have large load on it.  Similarly, CLA4 also have higher delay than CLA2.  Parallel CLA4 design improves this delay compare to serial CLA4 design by roughly 1.5ns.   A much smaller improvement is shown for CLA2 (0.2ns-0.5ns).
  2. In comparison between the two Variable time adder structures, CarrySkip adders perform the best with Parallel structure (on average1ns and possibly 3-4ns in some instance).  The best case occurs when the propagation chain of addition is long (ex: -1 + 0).  CarrySelect and Conditional Sum adders’ performance is also slightly higher in Parallel structure (0.3ns up to 1ns depending on input).  The cost of using Parallel structure instead of Serial structure is there are more 2 input OR gates and AND gates to calculate the finish signal.
  3. This is a graph that shows how group sizing affect the delays in Serial and Variable time adders for each adder design (using input distribution of zero arrival time for comparison).

General all adder type shows an improvement in delays with larger group sizing.  The only exception is in CLA Serial V.T. because of the complexity of the circuit as explained earlier.  It is also true that as in CarrySkip (CR), CarrySkip (SCR), as the group size reaches too big (16), delay actually slightly increased compare to group size of 8 bit.  There is an optimal group size for each adder design.

  1. Various input delay distribution how different adder design perform under these situation is also studied.  The delay number for zero arrival time is used as a base for comparison.

1.            Serial Variable Time Adder

a)      Late arrival:

CarrySkip adders are not affected by late arrival input as expected.  CarrySelect adders delay increase by roughly 1ns and Conditional sum adders delay increase by ~3ns because of faster addition and have to wait for input. 

b)      Early arrival:

This distribution increase delays across all adder type.   And the effects of the delay are the same for all.

c)      Middle arrival:

This distribution slightly increase the delay of CarrySkip adders be drastically increase the delay in CarrySelect and Conditional sum.  This is mostly due to the fact that since input for the middle operands have not arrived, calculation of sum cannot proceed even though all sum calculation performs in parallel.  With this distribution lessen the delay gap between CarrySkip type and CarrySelect/Condition sum type to only 2ns in worse case. 

2.             Parallel Variable Time Adder

a)      Late arrival:

There are no affects in delay number for all adder type. 

b)      Early arrival:

This distribution increase delays across all adder type.   And the effects of the delay are higher in Conditional Sum adder.  It lessens the performance gap between CarrySkip and Conditional Sum.

c)      Middle arrival:

This distribution slightly increases the delay of CarrySkip adders and CarrySelect adders but drastically increase the delay in and Conditional sum.  This is mostly due to the fact that since input for the middle operands have not arrived, calculation of sum cannot proceed even though all sum calculation performs in parallel.  With this distribution lessen the delay gap between CarrySkip, CarrySelect, with Condition sum type.  In many instance of random number operant, the delay performance is actually much better in CarrySkip and Carry Select than Conditional sum for small group size (2-8 bits).  On average the delays of addition is the same across the three types of group adder for large group size (16 bits). 

  1. In general for large group sizes (best case for each adder type), CarrySkip adder performs the worse, follow by CarrySelect and Conditional Sum is the best in Serial Variable Time adder.  In the Parallel case, CarrySkip and CarrySelect adder perform roughly the same, and Conditional Sum is the best.

 

Conclusion

Our Variable time adder-modeling tool basically allow user to build an arbitrary design and get the resulting delay number of all signals.  It is an easy tool that can be use to find the best adder design for a given input parameters.  In our analysis we demonstrate and studies some delay numbers generated from different adder designs.

            For improvements on our system, we can expand features like multi-level grouping to allow tree like adders.  We can include other basic adder types to be used in each level.  The GUI currently assumes the user inputs data correctly and does not perform error checking, so another improvement is to add in error checking for the adder design.  A nice feature to add would be file input and output to allow users to save and load signals and adder designs.  We can also calculate the costs of the circuit in terms of area.  And we can try to dynamically generate different gate level circuits using the gate simulator.  For example we can generate the CLA adder dynamically enabling us to create variable bit CLA groups.

 

Reference

1.                  COMS 252A Digital Arithmetic.  M. Ercegovac & T. Lang.  December 2002.


Appendix A: Table of Data for all Test cases of Serial Variable Time Adder. 

 

t0 same arrival

 

 

 

 

t1 late arrival

 

 

 

 

 

 

 

 

 

 

 

 

 

 

propagation chain of 32 bit

 

 

 

propagation chain of 32 bit

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

11.3256

6.7836

4.2274

2.4539

 

carryskip(CR)

26.3256

15.7836

10.2274

7.4539

carryskip(SCR)

11.3256

6.7836

4.2274

2.4539

 

carryskip(SCR)

26.3256

15.7836

10.2274

7.4539

carryskip(CLA)

11.3856

6.8136

 

 

 

carryskip(CLA)

26.3856

15.8136

 

 

carryselect(CR)

4.4136

3.1852

3.2721

4.7111

 

carryselect(CR)

5.435

5.435

5.435

5.435

carryselect(SCR)

4.157

2.677

2.237

2.617

 

carryselect(SCR)

5.535

5.535

5.535

5.535

carryselect(CLA)

4.2318

3.2858

 

 

 

carryselect(CLA)

6.0458

6.3838

 

 

condsum(CR)

 

3.1616

2.6276

3.0596

 

condsum(CR)

 

5.61

5.61

5.61

condsum(SCR)

 

2.932

2.132

2.032

 

condsum(SCR)

 

5.71

5.71

5.71

condsum(CLA)

 

0.8068

1.5408

 

 

condsum(CLA)

 

5.7708

6.1088

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at 0, then propagate

 

 

 

 

g at 0, then propagate

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

11.5436

7.42105

5.77515

6.06995

 

carryskip(CR)

26.5436

16.4211

11.7752

11.07

carryskip(SCR)

11.2618

6.78965

4.44455

3.34095

 

carryskip(SCR)

26.2618

15.7897

10.4446

8.34095

carryskip(CLA)

11.8243

7.7392

 

 

 

carryskip(CLA)

26.8243

16.7392

 

 

carryselect(CR)

4.3754

3.245

3.5042

5.2826

 

carryselect(CR)

5.435

5.435

5.435

5.435

carryselect(SCR)

4.009

2.529

2.089

2.469

 

carryselect(SCR)

5.535

5.535

5.535

5.535

carryselect(CLA)

4.51155

3.44855

 

 

 

carryselect(CLA)

6.22855

6.60255

 

 

condsum(CR)

 

3.3604

2.91

3.5092

 

condsum(CR)

 

5.61

5.61

5.61

condsum(SCR)

 

2.932

2.132

2.032

 

condsum(SCR)

 

5.71

5.71

5.71

condsum(CLA)

 

3.36155

3.03455

 

 

condsum(CLA)

 

6.47855

6.85255

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at middle, then propagate

 

 

 

g at middle, then propagate

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

11.2278

7.02165

5.20855

5.58055

 

carryskip(CR)

26.2278

16.0217

11.2086

10.5806

carryskip(SCR)

11.0378

6.56565

4.22055

3.48895

 

carryskip(SCR)

26.0378

15.5657

10.2206

8.48895

carryskip(CLA)

11.6205

8.0324

 

 

 

carryskip(CLA)

26.6205

17.0324

 

 

carryselect(CR)

4.3992

3.178

3.2942

5.2826

 

carryselect(CR)

5.435

5.435

5.435

5.435

carryselect(SCR)

4.157

2.677

2.237

2.617

 

carryselect(SCR)

5.535

5.535

5.535

5.535

carryselect(CLA)

4.2318

3.2858

 

 

 

carryselect(CLA)

6.22855

6.60255

 

 

condsum(CR)

 

3.1616

2.6276

3.2592

 

condsum(CR)

 

5.61

5.61

5.61

condsum(SCR)

 

2.932

2.132

2.032

 

condsum(SCR)

 

5.71

5.71

5.71

condsum(CLA)

 

2.42155

2.53455

 

 

condsum(CLA)

 

6.47855

6.85255

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at last, then propagate

 

 

 

 

g at last, then propagate

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

11.0378

7.02165

5.20855

5.16895

 

carryskip(CR)

21.2278

11.0216

6.20855

5.7851

carryskip(SCR)

11.6205

6.56565

4.22055

5.16895

 

carryskip(SCR)

21.0378

10.5656

5.694

5.7851

carryskip(CLA)

4.4136

8.0324

 

 

 

carryskip(CLA)

21.6205

12.0324

 

 

carryselect(CR)

4.157

3.1852

3.2721

4.7111

 

carryselect(CR)

5.8501

5.8501

5.8501

5.8501

carryselect(SCR)

4.2318

2.677

2.237

2.617

 

carryselect(SCR)

5.759

5.759

5.759

5.759

carryselect(CLA)

 

3.2858

 

 

 

carryselect(CLA)

6.0646

6.16355

 

 

condsum(CR)

 

3.1616

2.6276

3.0596

 

condsum(CR)

 

6.0251

6.0251

6.0251

condsum(SCR)

 

2.932

2.132

2.032

 

condsum(SCR)

 

5.934

5.934

5.934

condsum(CLA)

 

1.42155

1.9908

 

 

condsum(CLA)

 

6.3146

6.41355

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

kill all signal

 

 

 

 

 

kill all signal

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

9.76

8.688

8.152

7.884

 

carryskip(CR)

9.76

8.688

8.152

7.884

carryskip(SCR)

6.72

5.04

4.2

5.832

 

carryskip(SCR)

6.72

5.47

5.47

5.832

carryskip(CLA)

14.619

14.989

 

 

 

carryskip(CLA)

14.619

14.989

 

 

carryselect(CR)

3.975

2.761

2.853

4.297

 

carryselect(CR)

5.435

5.435

5.435

5.435

carryselect(SCR)

3.785

2.305

1.865

2.245

 

carryselect(SCR)

5.535

5.535

5.535

5.535

carryselect(CLA)

3.585

1.905

 

 

 

carryselect(CLA)

5.435

5.435

 

 

condsum(CR)

 

2.75

2.216

2.648

 

condsum(CR)

 

5.61

5.61

5.61

condsum(SCR)

 

2.56

1.76

1.66

 

condsum(SCR)

 

5.71

5.71

5.71

condsum(CLA)

 

0.16

0.16

 

 

condsum(CLA)

 

5.16

5.16

 


 

 

gen all signals

 

 

 

 

gen all signals

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

10.7028

9.9652

9.5964

9.412

 

carryskip(CR)

10.7028

9.9652

9.5964

9.412

carryskip(SCR)

6.944

5.264

4.424

2.404

 

carryskip(SCR)

6.944

5.694

5.694

5.4541

carryskip(CLA)

15.3658

15.8939

 

 

 

carryskip(CLA)

15.3658

15.8939

 

 

carryselect(CR)

4.3178

3.173

3.4271

5.2005

 

carryselect(CR)

5.5191

5.5191

5.5191

5.8001

carryselect(SCR)

4.009

2.529

2.089

2.469

 

carryselect(SCR)

5.759

5.759

5.759

5.759

carryselect(CLA)

4.2146

3.0716

 

 

 

carryselect(CLA)

6.0646

6.1136

 

 

condsum(CR)

 

3.1728

2.7224

3.3216

 

condsum(CR)

 

5.6941

5.6941

5.6941

condsum(SCR)

 

2.784

1.984

1.884

 

condsum(SCR)

 

5.934

5.934

5.934

condsum(CLA)

 

3.0646

2.6016

 

 

condsum(CLA)

 

6.3146

6.3636

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

10.5508

9.38

8.8858

8.6596

 

carryskip(CR)

14.5508

9.38

8.8858

8.6596

carryskip(SCR)

8.0954

5.264

4.424

5.4824

 

carryskip(SCR)

12.0954

5.694

5.694

5.7851

carryskip(CLA)

14.1323

16.0848

 

 

 

carryskip(CLA)

18.1322

16.0848

 

 

carryselect(CR)

4.388

3.1676

3.3385

4.8646

 

carryselect(CR)

5.8501

5.8501

5.8501

5.8501

carryselect(SCR)

4.009

2.529

2.089

2.469

 

carryselect(SCR)

5.759

5.759

5.759

5.759

carryselect(CLA)

4.2596

3.26255

 

 

 

carryselect(CLA)

6.0646

6.1136

 

 

condsum(CR)

 

3.3604

2.6388

3.1338

 

condsum(CR)

 

6.0251

6.0251

6.0251

condsum(SCR)

 

2.932

1.984

1.884

 

condsum(SCR)

 

5.934

5.934

5.934

condsum(CLA)

 

2.30055

2.42555

 

 

condsum(CLA)

 

6.3146

6.3636

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

10.5223

9.38

8.8858

8.6596

 

carryskip(CR)

10.5223

9.38

8.8858

8.6596

carryskip(SCR)

7.5197

5.264

4.424

6.265

 

carryskip(SCR)

7.5197

5.47

5.47

6.265

carryskip(CLA)

14.92

16.0998

 

 

 

carryskip(CLA)

14.92

16.0998

 

 

carryselect(CR)

4.388

3.1658

3.336

4.8636

 

carryselect(CR)

5.7411

5.7411

5.7411

5.7411

carryselect(SCR)

4.009

2.529

2.089

2.469

 

carryselect(SCR)

5.535

5.535

5.535

5.535

carryselect(CLA)

4.51155

3.3576

 

 

 

carryselect(CLA)

5.435

5.435

 

 

condsum(CR)

 

3.3604

2.6388

3.131

 

condsum(CR)

 

5.9161

5.9161

5.9161

condsum(SCR)

 

2.932

1.984

1.884

 

condsum(SCR)

 

5.71

5.71

5.71

condsum(CLA)

 

1.91155

2.10755

 

 

condsum(CLA)

 

5.16

5.16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

10.0669

9.3504

8.8562

8.5882

 

carryskip(CR)

10.0669

9.3504

8.8562

8.5882

carryskip(SCR)

7.00785

5.412

4.572

6.3294

 

carryskip(SCR)

7.00785

5.47

5.47

6.3294

carryskip(CLA)

14.9091

16.0998

 

 

 

carryskip(CLA)

14.9091

16.0998

 

 

carryselect(CR)

4.3974

3.2216

3.395

4.8758

 

carryselect(CR)

5.435

5.435

5.435

5.435

carryselect(SCR)

4.157

2.677

2.237

2.617

 

carryselect(SCR)

5.535

5.535

5.535

5.535

carryselect(CLA)

4.30155

3.3576

 

 

 

carryselect(CLA)

5.435

5.435

 

 

condsum(CR)

 

3.1616

2.6694

3.185

 

condsum(CR)

 

5.61

5.61

5.61

condsum(SCR)

 

2.932

2.132

2.032

 

condsum(SCR)

 

5.71

5.71

5.71

condsum(CLA)

 

1.66155

1.60755

 

 

condsum(CLA)

 

5.16

5.16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

11.0401

8.54045

7.77925

8.8268

 

carryskip(CR)

25.0401

16.5405

12.7793

8.8268

carryskip(SCR)

9.53465

5.91785

4.43085

6.3904

 

carryskip(SCR)

23.5347

13.9179

9.43085

6.3904

carryskip(CLA)

13.2547

12.6144

 

 

 

carryskip(CLA)

27.2547

20.6144

 

 

carryselect(CR)

4.3898

3.1676

3.3828

4.9079

 

carryselect(CR)

5.9354

5.435

5.435

5.435

carryselect(SCR)

4.009

2.529

2.089

2.469

 

carryselect(SCR)

5.535

5.535

5.535

5.535

carryselect(CLA)

4.51155

3.44855

 

 

 

carryselect(CLA)

6.22855

6.60255

 

 

condsum(CR)

 

3.3604

2.6154

3.2592

 

condsum(CR)

 

6.1104

5.61

5.61

condsum(SCR)

 

2.932

1.984

2.032

 

condsum(SCR)

 

5.71

5.71

5.71

condsum(CLA)

 

2.36155

2.30755

 

 

condsum(CLA)

 

6.47855

6.85255

 

 

t2 early arrival

 

 

 

 

t3 middle arrival

 

 

 

 

 

 

 

 

 

 

 

 

 

 

propagation chain of 32 bit

 

 

 

propagation chain of 32 bit

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

26.3256

15.7836

10.2274

7.4539

 

carryskip(CR)

29.3256

18.7836

14.2274

12.4539

carryskip(SCR)

26.3256

15.7836

10.2274

7.4539

 

carryskip(SCR)

29.3256

18.7836

14.2274

12.4539

carryskip(CLA)

26.3856

15.8136

 

 

 

carryskip(CLA)

29.3856

18.8136

 

 

carryselect(CR)

8.769

7.5406

7.6275

9.0665

 

carryselect(CR)

7.1294

6.6934

7.2025

8.854

carryselect(SCR)

8.785

7.305

6.865

7.245

 

carryselect(SCR)

7.215

6.465

6.445

7.035

carryselect(CLA)

9.2318

8.2858

 

 

 

carryselect(CLA)

7.7258

7.4458

 

 

condsum(CR)

 

7.517

6.983

7.415

 

condsum(CR)

 

6.61

6.483

 

condsum(SCR)

 

7.56

6.76

6.66

 

condsum(SCR)

 

6.71

6.26

7.165

condsum(CLA)

 

5.8068

6.5408

 

 

condsum(CLA)

 

5.8068

6.5408

6.41

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at 0, then propagate

 

 

 

 

g at 0, then propagate

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

26.6439

15.9718

10.2267

7.32305

 

carryskip(CR)

29.5436

19.4211

15.7752

11.517

carryskip(SCR)

26.2618

15.7897

10.4446

8.34095

 

carryskip(SCR)

29.2618

18.7897

14.4446

11.6169

carryskip(CLA)

26.6044

16.5332

 

 

 

carryskip(CLA)

29.8243

19.7392

 

 

carryselect(CR)

9.3911

7.7111

6.8711

6.4511

 

carryselect(CR)

7.115

6.275

5.855

5.645

carryselect(SCR)

9.009

7.529

7.089

7.469

 

carryselect(SCR)

7.215

6.465

6.445

7.035

carryselect(CLA)

9.2916

8.2426

 

 

 

carryselect(CLA)

7.9996

7.66455

 

 

condsum(CR)

 

8.1661

7.1661

6.6661

 

condsum(CR)

 

6.61

6.11

5.86

condsum(SCR)

 

7.784

6.984

6.884

 

condsum(SCR)

 

6.71

6.26

6.41

condsum(CLA)

 

8.1416

7.7726

 

 

condsum(CLA)

 

7.47855

7.53455

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at middle, then propagate

 

 

 

g at middle, then propagate

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

26.2278

16.0217

10.2086

9.93595

 

carryskip(CR)

24.2278

15.0969

12.8188

11.9321

carryskip(SCR)

26.0378

15.5657

9.22055

8.11695

 

carryskip(SCR)

24.0378

15.0058

12.7277

11.8409

carryskip(CLA)

26.6205

17.0324

 

 

 

carryskip(CLA)

24.6205

15.3791

 

 

carryselect(CR)

8.7546

7.5334

7.6225

9.064

 

carryselect(CR)

7.8671

7.0271

6.6071

6.3971

carryselect(SCR)

8.785

7.305

6.865

7.245

 

carryselect(SCR)

7.439

6.599

6.445

7.035

carryselect(CLA)

9.2318

8.2858

 

 

 

carryselect(CLA)

7.77055

7.66455

 

 

condsum(CR)

 

7.517

6.983

7.415

 

condsum(CR)

 

7.0251

6.5251

6.2751

condsum(SCR)

 

7.56

6.76

6.66

 

condsum(SCR)

 

6.934

6.434

6.41

condsum(CLA)

 

7.0068

7.2408

 

 

condsum(CLA)

 

7.3146

7.53455

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at last, then propagate

 

 

 

 

g at last, then propagate

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

26.2278

16.0217

11.2085

10.1689

 

carryskip(CR)

29.2278

19.0217

15.2085

10.1689

carryskip(SCR)

26.0378

15.5657

10.2205

10.1689

 

carryskip(SCR)

29.0378

18.5657

14.2205

10.1689

carryskip(CLA)

26.6205

17.0324

 

 

 

carryskip(CLA)

29.6205

20.0324

 

 

carryselect(CR)

8.769

7.5406

7.6275

9.0665

 

carryselect(CR)

7.1294

6.6934

7.2025

8.854

carryselect(SCR)

8.785

7.305

6.865

7.245

 

carryselect(SCR)

7.215

6.465

6.445

7.035

carryselect(CLA)

9.2318

8.2858

 

 

 

carryselect(CLA)

7.7258

7.4458

 

 

condsum(CR)

 

7.517

6.983

7.415

 

condsum(CR)

 

6.61

6.483

7.165

condsum(SCR)

 

7.56

6.76

6.66

 

condsum(SCR)

 

6.71

6.26

6.41

condsum(CLA)

 

6.0068

6.7408

 

 

condsum(CLA)

 

6.0068

6.7408

 


 

 

kill all signal

 

 

 

 

kill all signal

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

14.527

13.455

12.919

12.651

 

carryskip(CR)

10.17

9.634

9.366

9.232

carryskip(SCR)

11.72

10.04

9.2

10.832

 

carryskip(SCR)

8.75

7.91

7.49

9.332

carryskip(CLA)

19.485

19.791

 

 

 

carryskip(CLA)

14.619

14.989

 

 

carryselect(CR)

8.742

7.528

7.62

9.064

 

carryselect(CR)

7.115

6.688

7.2

8.854

carryselect(SCR)

8.785

7.305

6.865

7.245

 

carryselect(SCR)

7.215

6.465

6.445

7.035

carryselect(CLA)

8.585

6.905

 

 

 

carryselect(CLA)

7.115

6.275

 

 

condsum(CR)

 

7.517

6.983

7.415

 

condsum(CR)

 

6.61

6.483

7.165

condsum(SCR)

 

7.56

6.76

6.66

 

condsum(SCR)

 

6.71

6.26

6.41

condsum(CLA)

 

5.16

5.16

 

 

condsum(CLA)

 

5.16

5.16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

gen all signals

 

 

 

 

gen all signals

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

9.3261

7.6461

6.8061

6.3861

 

carryskip(CR)

10.7028

6.7941

6.3741

6.1641

carryskip(SCR)

11.944

10.264

9.424

7.404

 

carryskip(SCR)

8.974

8.134

7.714

5.904

carryskip(CLA)

20.3358

20.8938

 

 

 

carryskip(CLA)

15.3658

15.8939

 

 

carryselect(CR)

9.4181

7.7237

6.8786

6.4536

 

carryselect(CR)

7.7135

6.8663

6.4441

6.2316

carryselect(SCR)

9.009

7.529

7.089

7.469

 

carryselect(SCR)

7.439

6.689

6.669

7.259

carryselect(CLA)

9.1846

8.0716

 

 

 

carryselect(CLA)

7.7446

7.2316

 

 

condsum(CR)

 

8.1661

7.1661

6.6661

 

condsum(CR)

 

6.9751

6.4751

6.2251

condsum(SCR)

 

7.784

6.984

6.884

 

condsum(SCR)

 

6.934

6.484

6.634

condsum(CLA)

 

8.0346

7.6016

 

 

condsum(CLA)

 

7.3146

7.1016

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

19.2193

13.4229

12.8109

12.5847

 

carryskip(CR)

16.1891

10.5268

10.2588

10.1666

carryskip(SCR)

17.0954

10.264

9.424

10.4824

 

carryskip(SCR)

14.9856

8.282

7.862

9.1304

carryskip(CLA)

23.1023

20.8938

 

 

 

carryskip(CLA)

19.1323

16.0848

 

 

carryselect(CR)

9.4037

7.7183

7.2636

8.7887

 

carryselect(CR)

7.9126

7.5768

8.1713

9.8646

carryselect(SCR)

9.009

7.529

7.089

7.469

 

carryselect(SCR)

7.587

6.837

6.817

7.407

carryselect(CLA)

9.1846

8.0716

 

 

 

carryselect(CLA)

8.04155

7.39455

 

 

condsum(CR)

 

8.1661

7.1661

7.0561

 

condsum(CR)

 

7.3604

7.3682

8.1338

condsum(SCR)

 

7.784

6.984

6.884

 

condsum(SCR)

 

7.082

6.632

6.782

condsum(CLA)

 

7.0346

7.1016

 

 

condsum(CLA)

 

7.11155

7.30455

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

16.759

13.4229

12.8109

12.5847

 

carryskip(CR)

11.5223

9.8012

9.5332

9.441

carryskip(SCR)

14.5197

10.264

9.424

11.265

 

carryskip(SCR)

8.75

7.91

7.49

9.541

carryskip(CLA)

21.7

20.8938

 

 

 

carryskip(CLA)

15.92

16.0998

 

 

carryselect(CR)

9.4037

7.7165

7.2611

8.7887

 

carryselect(CR)

7.1204

6.6898

7.2418

9.063

carryselect(SCR)

9.009

7.529

7.089

7.469

 

carryselect(SCR)

7.215

6.465

6.445

7.035

carryselect(CLA)

9.2916

8.0716

 

 

 

carryselect(CLA)

7.115

6.275

 

 

condsum(CR)

 

8.1661

7.1661

7.0561

 

condsum(CR)

 

6.61

6.483

7.2068

condsum(SCR)

 

7.784

6.984

6.884

 

condsum(SCR)

 

6.71

6.26

6.41

condsum(CLA)

 

6.6916

6.6516

 

 

condsum(CLA)

 

5.517

5.66

 

 

 

 

 

 

 

 

 

 

 

 


 

 

 

 

 

 

 

 

 

 


 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

15.0668

14.0414

13.5472

13.2792

 

carryskip(CR)

10.2536

9.7594

9.4914

9.3574

carryskip(SCR)

12.0078

10.412

9.572

11.3294

 

carryskip(SCR)

8.75

7.91

7.49

9.4574

carryskip(CLA)

19.9091

20.9678

 

 

 

carryskip(CLA)

14.9091

16.0998

 

 

carryselect(CR)

9.1644

7.9126

8.086

9.5668

 

carryselect(CR)

7.7165

6.8747

7.3096

8.9611

carryselect(SCR)

9.157

7.677

7.237

7.617

 

carryselect(SCR)

7.329

6.689

6.669

7.259

carryselect(CLA)

9.2318

8.2006

 

 

 

carryselect(CLA)

7.6116

6.80885

 

 

condsum(CR)

 

7.9286

7.3604

7.876

 

condsum(CR)

 

7.1661

6.6661

7.2721

condsum(SCR)

 

7.932

7.132

7.032

 

condsum(SCR)

 

6.784

6.484

6.634

condsum(CLA)

 

6.3068

6.47555

 

 

condsum(CLA)

 

5.9416

5.5188

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

20.9074

13.8581

11.9791

13.0267

 

carryskip(CR)

18.0401

9.54045

8.72045

9.902

carryskip(SCR)

19.5347

11.9178

9.43085

11.3904

 

carryskip(SCR)

16.5347

8.7179

7.86885

10.0384

carryskip(CLA)

23.0348

18.4085

 

 

 

carryskip(CLA)

20.2547

13.6144

 

 

carryselect(CR)

9.4055

7.7183

7.5827

9.1078

 

carryselect(CR)

7.6908

7.0254

7.5356

9.524

carryselect(SCR)

9.009

7.529

7.089

7.469

 

carryselect(SCR)

7.587

6.837

6.817

7.407

carryselect(CLA)

9.2916

8.2426

 

 

 

carryselect(CLA)

7.6678

7.0868

 

 

condsum(CR)

 

8.1661

7.1661

7.3727

 

condsum(CR)

 

7.0216

6.8186

7.5006

condsum(SCR)

 

7.784

6.984

6.884

 

condsum(SCR)

 

7.082

6.632

6.782

condsum(CLA)

 

7.1416

7.0226

 

 

condsum(CLA)

 

6.5068

6.8818

 


Appendix B: Table of Data for all Test cases of Parallel Variable Time Adder.


 

 

t0 same arrival

 

 

 

 

t1 late arrival

 

 

 

 

 

 

 

 

 

 

 

 

 

 

propagation chain of 32 bit

 

 

 

propagation chain of 32 bit

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

11.2276

6.42535

3.49135

1.45765

 

carryskip(CR)

21.2275

10.4254

4.49135

1.45765

carryskip(SCR)

11.2276

6.42535

3.49135

1.45765

 

carryskip(SCR)

21.2275

10.4254

4.49135

1.45765

carryskip(CLA)

11.3588

6.5266

 

 

 

carryskip(CLA)

21.3588

10.5266

 

 

carryselect(CR)

4.7384

3.3799

3.2758

4.5861

 

carryselect(CR)

4.9716

3.8415

3.2758

4.5861

carryselect(SCR)

4.4818

2.8717

2.2428

2.4927

 

carryselect(SCR)

5.0698

3.9397

2.2428

2.4927

carryselect(CLA)

4.07875

3.00265

 

 

 

carryselect(CLA)

5.10275

4.31065

 

 

condsum(CR)

 

7.6909

4.8936

2.7603

 

condsum(CR)

 

10.0877

4.8936

2.7603

condsum(SCR)

 

6.0837

3.4068

1.7327

 

condsum(SCR)

 

9.1397

3.7348

1.7327

condsum(CLA)

 

4.67945

4.42435

 

 

condsum(CLA)

 

8.60745

4.99235

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at 0, then propagate

 

 

 

g at 0, then propagate

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

11.4455

7.0628

5.0391

5.0737

 

carryskip(CR)

21.4455

11.0628

6.0391

5.0737

carryskip(SCR)

11.1637

6.4314

3.7085

2.3447

 

carryskip(SCR)

21.1637

10.4314

4.7085

2.3447

carryskip(CLA)

11.7975

7.4522

 

 

 

carryskip(CLA)

21.7975

11.4522

 

 

carryselect(CR)

4.7002

3.4397

3.5121

5.07475

 

carryselect(CR)

4.9698

3.8397

3.5121

5.07475

carryselect(SCR)

4.3338

2.7237

2.0948

2.3447

 

carryselect(SCR)

5.0698

3.9397

2.0948

2.3447

carryselect(CLA)

4.4335

3.2404

 

 

 

carryselect(CLA)

5.39255

4.6044

 

 

condsum(CR)

 

9.0825

5.7408

3.2099

 

condsum(CR)

 

11.0821

5.7408

3.2099

condsum(SCR)

 

6.0837

3.4068

1.7327

 

condsum(SCR)

 

9.1397

3.7348

1.7327

condsum(CLA)

 

8.2467

5.9756

 

 

condsum(CLA)

 

12.1548

6.5236

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at middle, then propagate

 

 

 

g at middle, then propagate

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

11.1297

6.6634

4.4725

4.5843

 

carryskip(CR)

21.1297

10.6634

5.4725

4.5843

carryskip(SCR)

10.9397

6.2074

3.4845

2.4927

 

carryskip(SCR)

20.9397

10.2074

4.4845

2.4927

carryskip(CLA)

11.5937

7.7454

 

 

 

carryskip(CLA)

21.5937

11.7454

 

 

carryselect(CR)

4.724

3.3727

3.30105

4.58535

 

carryselect(CR)

4.9698

3.8397

3.30105

4.58535

carryselect(SCR)

4.4818

2.8717

2.2428

2.4927

 

carryselect(SCR)

5.0698

3.9397

2.2428

2.4927

carryselect(CLA)

4.15375

3.07765

 

 

 

carryselect(CLA)

5.39255

4.6044

 

 

condsum(CR)

 

8.2873

5.176

2.7603

 

condsum(CR)

 

10.2869

5.176

2.7603

condsum(SCR)

 

6.0837

3.4068

1.7327

 

condsum(SCR)

 

9.1397

3.7348

1.7327

condsum(CLA)

 

6.57545

5.1881

 

 

condsum(CLA)

 

10.4835

5.7361

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at last, then propagate

 

 

 

g at last, then propagate

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

11.2276

6.42535

3.49135

1.45765

 

carryskip(CR)

21.2275

10.4254

4.49135

1.45765

carryskip(SCR)

11.2276

6.42535

3.49135

1.45765

 

carryskip(SCR)

21.2275

10.4254

4.49135

1.45765

carryskip(CLA)

11.3588

6.5266

 

 

 

carryskip(CLA)

21.3588

10.5266

 

 

carryselect(CR)

4.7384

3.3799

3.2758

4.5861

 

carryselect(CR)

4.9716

3.8415

3.2758

4.5861

carryselect(SCR)

4.4818

2.8717

2.2428

2.4927

 

carryselect(SCR)

5.0698

3.9397

2.2428

2.4927

carryselect(CLA)

4.07875

3.00265

 

 

 

carryselect(CLA)

5.10275

4.31065

 

 

condsum(CR)

 

7.6909

4.8936

2.7603

 

condsum(CR)

 

10.0877

4.8936

2.7603

condsum(SCR)

 

6.0837

3.4068

1.7327

 

condsum(SCR)

 

9.1397

3.7348

1.7327

condsum(CLA)

 

4.67945

4.42435

 

 

condsum(CLA)

 

8.60745

4.99235

 

 

 

 

 

 

 

 

 

 

 

 

 

kill all signal

 

 

 

 

kill all signal

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

9.7598

8.0917

6.4348

4.1727

 

carryskip(CR)

9.7598

8.0917

6.4348

4.1727

carryskip(SCR)

6.9098

4.8997

3.4708

2.1207

 

carryskip(SCR)

6.9098

4.8997

3.4708

2.1207

carryskip(CLA)

14.3573

13.4832

 

 

 

carryskip(CLA)

14.3573

13.4832

 

 

carryselect(CR)

4.2998

2.9557

2.8588

4.1727

 

carryselect(CR)

4.9698

3.8397

2.8588

4.1727

carryselect(SCR)

4.1098

2.4997

1.8708

2.1207

 

carryselect(SCR)

5.0698

3.9397

1.8708

2.1207

carryselect(CLA)

3.43195

1.62185

 

 

 

carryselect(CLA)

4.49195

3.36185

 

 

condsum(CR)

 

4.8097

3.6588

2.3487

 

condsum(CR)

 

8.0297

3.8028

2.3487

condsum(SCR)

 

3.4797

2.2908

1.3607

 

condsum(SCR)

 

7.2797

2.9908

1.3607

condsum(CLA)

 

0.6297

0.4408

 

 

condsum(CLA)

 

4.15185

1.28195

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

gen all signals

 

 

 

 

gen all signals

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

10.6608

9.2435

7.5866

5.0737

 

carryskip(CR)

10.6608

9.2435

7.5866

5.0737

carryskip(SCR)

7.1338

5.1237

3.6948

2.3447

 

carryskip(SCR)

7.1338

5.1237

3.6948

2.3447

carryskip(CLA)

15.0832

14.3881

 

 

 

carryskip(CLA)

15.0832

14.3881

 

 

carryselect(CR)

4.6426

3.3677

3.4254

5.0737

 

carryselect(CR)

5.0557

3.9256

3.4254

5.0737

carryselect(SCR)

4.3338

2.7237

2.0948

2.3447

 

carryselect(SCR)

5.2938

4.1637

2.0948

2.3447

carryselect(CLA)

4.13655

2.86345

 

 

 

carryselect(CLA)

5.19655

4.11545

 

 

condsum(CR)

 

7.7693

5.178

3.0223

 

condsum(CR)

 

10.3119

5.178

3.0223

condsum(SCR)

 

5.0477

2.9628

1.5847

 

condsum(SCR)

 

8.8477

3.6628

1.5847

condsum(CLA)

 

6.55405

4.67675

 

 

condsum(CLA)

 

10.5341

5.16875

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

10.5506

8.7837

7.1686

4.7393

 

carryskip(CR)

14.5506

8.7837

7.1686

4.7393

carryskip(SCR)

8.2852

5.1237

3.6948

2.3447

 

carryskip(SCR)

12.2852

5.1237

3.6948

2.3447

carryskip(CLA)

13.8706

14.579

 

 

 

carryskip(CLA)

17.8705

14.579

 

 

carryselect(CR)

4.7128

3.3623

3.34285

4.74035

 

carryselect(CR)

4.9698

4.4083

3.34285

4.74035

carryselect(SCR)

4.3338

2.7237

2.0948

2.3447

 

carryselect(SCR)

5.0698

4.3117

2.0948

2.3447

carryselect(CLA)

4.10655

2.9794

 

 

 

carryselect(CLA)

4.49195

4.08065

 

 

condsum(CR)

 

7.8981

5.229

2.8317

 

condsum(CR)

 

11.2333

5.229

2.8317

condsum(SCR)

 

5.5637

3.2588

1.5847

 

condsum(SCR)

 

9.3637

3.9588

1.5847

condsum(CLA)

 

5.90945

4.9126

 

 

condsum(CLA)

 

9.80145

5.6966

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

10.4803

8.7419

7.0432

4.7393

 

carryskip(CR)

10.4803

8.7419

7.0432

4.7393

carryskip(SCR)

7.7095

5.1237

3.6948

2.3447

 

carryskip(SCR)

7.7095

5.1237

3.6948

2.3447

carryskip(CLA)

14.6583

14.594

 

 

 

carryskip(CLA)

14.6583

14.594

 

 

carryselect(CR)

4.7128

3.3605

3.34285

4.7393

 

carryselect(CR)

5.0384

3.8415

3.34285

4.7393

carryselect(SCR)

4.3338

2.7237

2.0948

2.3447

 

carryselect(SCR)

5.0698

3.9397

2.0948

2.3447

carryselect(CLA)

4.3585

3.07445

 

 

 

carryselect(CLA)

4.50975

4.05865

 

 

condsum(CR)

 

8.2027

4.6186

2.8317

 

condsum(CR)

 

10.8026

5.0269

2.8317

condsum(SCR)

 

5.9357

2.8868

1.5847

 

condsum(SCR)

 

9.1397

3.5868

1.5847

condsum(CLA)

 

6.02445

4.4899

 

 

condsum(CLA)

 

9.7657

5.19585

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 


 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

10.0667

8.7541

7.139

4.7515

 

carryskip(CR)

10.0667

8.7541

7.139

4.7515

carryskip(SCR)

7.19765

5.2717

3.8428

2.4927

 

carryskip(SCR)

7.19765

5.2717

3.8428

2.4927

carryskip(CLA)

14.6474

14.594

 

 

 

carryskip(CLA)

14.6474

14.594

 

 

carryselect(CR)

4.7222

3.4163

3.3994

4.7515

 

carryselect(CR)

5.0384

3.9101

3.3994

4.7515

carryselect(SCR)

4.4818

2.8717

2.2428

2.4927

 

carryselect(SCR)

5.0698

3.9397

2.2428

2.4927

carryselect(CLA)

4.1485

3.07445

 

 

 

carryselect(CLA)

4.50975

3.66765

 

 

condsum(CR)

 

7.4893

4.9232

2.8857

 

condsum(CR)

 

10.3663

4.9232

2.8857

condsum(SCR)

 

5.5637

3.2588

1.7327

 

condsum(SCR)

 

8.9917

3.7348

1.7327

condsum(CLA)

 

4.63095

3.7011

 

 

condsum(CLA)

 

7.57815

3.7513

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

10.942

8.1822

7.0432

4.7811

 

carryskip(CR)

19.942

11.1822

7.0432

4.7811

carryskip(SCR)

9.4366

5.5596

3.6948

2.3447

 

carryskip(SCR)

18.4366

8.5596

3.6948

2.3447

carryskip(CLA)

13.2279

12.3274

 

 

 

carryskip(CLA)

22.2279

15.3274

 

 

carryselect(CR)

4.7146

3.3623

3.38825

4.7829

 

carryselect(CR)

5.4702

3.8397

3.38825

4.7829

carryselect(SCR)

4.3338

2.7237

2.0948

2.3447

 

carryselect(SCR)

5.0698

3.9397

2.0948

2.3447

carryselect(CLA)

4.4335

3.2404

 

 

 

carryselect(CLA)

5.39255

4.6044

 

 

condsum(CR)

 

8.1915

4.8814

2.8735

 

condsum(CR)

 

10.4581

4.8814

2.8735

condsum(SCR)

 

5.9357

3.2588

1.7327

 

condsum(SCR)

 

9.2157

3.8108

1.7327

condsum(CLA)

 

6.55525

5.0199

 

 

condsum(CLA)

 

10.4284

5.3759

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

t2 early arrival

 

 

 

 

t3 middle arrival

 

 

 

 

 

 

 

 

 

 

 

 

 

 

propagation chain of 32 bit

 

 

 

propagation chain of 32 bit

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

26.2276

15.4254

9.49135

6.45765

 

carryskip(CR)

29.2276

18.4253

13.4914

6.45765

carryskip(SCR)

26.2276

15.4254

9.49135

6.45765

 

carryskip(SCR)

29.2276

18.4253

13.4914

6.45765

carryskip(CLA)

26.3588

15.5266

 

 

 

carryskip(CLA)

29.3588

18.5266

 

 

carryselect(CR)

9.0938

7.7353

7.6312

8.9415

 

carryselect(CR)

7.4542

6.8881

7.2076

5.5225

carryselect(SCR)

9.1098

7.4997

6.8708

7.1207

 

carryselect(SCR)

7.5398

6.6597

6.4508

5.6207

carryselect(CLA)

9.07875

8.00265

 

 

 

carryselect(CLA)

7.57275

7.16265

 

 

condsum(CR)

 

14.7571

9.6044

7.1157

 

condsum(CR)

 

16.7985

12.9814

5.5607

condsum(SCR)

 

13.9677

8.6628

6.3607

 

condsum(SCR)

 

16.3957

12.3628

5.6607

condsum(CLA)

 

13.6795

10.4244

 

 

condsum(CLA)

 

16.6075

13.9924

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at 0, then propagate

 

 

 

g at 0, then propagate

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

26.5458

15.6135

9.4906

6.3268

 

carryskip(CR)

29.4455

19.0628

15.0391

5.5207

carryskip(SCR)

26.1637

15.4314

9.7085

7.3447

 

carryskip(SCR)

29.1637

18.4314

13.7085

5.6207

carryskip(CLA)

26.5776

16.2463

 

 

 

carryskip(CLA)

29.7975

19.4522

 

 

carryselect(CR)

9.7159

7.9058

6.88005

6.32785

 

carryselect(CR)

7.4398

6.4697

5.8629

5.52175

carryselect(SCR)

9.3338

7.7237

7.0948

7.3447

 

carryselect(SCR)

7.5398

6.6597

6.4508

5.6207

carryselect(CLA)

9.21355

8.03445

 

 

 

carryselect(CLA)

7.92155

7.4564

 

 

condsum(CR)

 

15.8878

9.9969

6.3668

 

condsum(CR)

 

17.0817

12.6408

5.5607

condsum(SCR)

 

14.1917

8.8868

6.5847

 

condsum(SCR)

 

16.3957

12.3628

5.6607

condsum(CLA)

 

17.0268

11.7137

 

 

condsum(CLA)

 

20.1027

15.5436

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at middle, then propagate

 

 

 

g at middle, then propagate

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

26.1297

15.6634

9.4725

8.9397

 

carryskip(CR)

24.1297

15.0757

12.4198

6.2728

carryskip(SCR)

25.9397

15.2074

8.4845

7.1207

 

carryskip(SCR)

23.9397

14.6476

11.9917

5.8447

carryskip(CLA)

26.5937

16.7454

 

 

 

carryskip(CLA)

24.5937

15.0922

 

 

carryselect(CR)

9.0794

7.7281

7.6297

8.94075

 

carryselect(CR)

8.1919

7.2218

6.615

6.27385

carryselect(SCR)

9.1098

7.4997

6.8708

7.1207

 

carryselect(SCR)

7.7638

6.7937

6.4508

5.8447

carryselect(CLA)

9.15375

8.07765

 

 

 

carryselect(CLA)

7.6925

7.4564

 

 

condsum(CR)

 

15.3535

9.8868

7.1157

 

condsum(CR)

 

17.0988

12.7735

6.0628

condsum(SCR)

 

13.9677

8.6628

6.3607

 

condsum(SCR)

 

16.6197

12.5868

5.8847

condsum(CLA)

 

15.5755

11.1881

 

 

condsum(CLA)

 

18.4325

14.5609

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

g at last, then propagate

 

 

 

g at last, then propagate

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

26.2276

15.4254

9.49135

6.45765

 

carryskip(CR)

29.2276

18.4253

13.4914

6.45765

carryskip(SCR)

26.2276

15.4254

9.49135

6.45765

 

carryskip(SCR)

29.2276

18.4253

13.4914

6.45765

carryskip(CLA)

26.3588

15.5266

 

 

 

carryskip(CLA)

29.3588

18.5266

 

 

carryselect(CR)

9.0938

7.7353

7.6312

8.9415

 

carryselect(CR)

7.4542

6.8881

7.2076

5.5225

carryselect(SCR)

9.1098

7.4997

6.8708

7.1207

 

carryselect(SCR)

7.5398

6.6597

6.4508

5.6207

carryselect(CLA)

9.07875

8.00265

 

 

 

carryselect(CLA)

7.57275

7.16265

 

 

condsum(CR)

 

14.7571

9.6044

7.1157

 

condsum(CR)

 

16.7985

12.9814

5.5607

condsum(SCR)

 

13.9677

8.6628

6.3607

 

condsum(SCR)

 

16.3957

12.3628

5.6607

condsum(CLA)

 

13.6795

10.4244

 

 

condsum(CLA)

 

16.6075

13.9924

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 


 

 

kill all signal

 

 

 

 

kill all signal

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

14.5268

12.8587

11.2018

8.9397

 

carryskip(CR)

10.1698

9.0377

7.6488

5.5207

carryskip(SCR)

11.9098

9.8997

8.4708

7.1207

 

carryskip(SCR)

8.9398

7.7697

6.7608

5.6207

carryskip(CLA)

19.2233

18.2852

 

 

 

carryskip(CLA)

14.3573

13.4832

 

 

carryselect(CR)

9.0668

7.7227

7.6258

8.9397

 

carryselect(CR)

7.4398

6.8827

7.2058

5.5207

carryselect(SCR)

9.1098

7.4997

6.8708

7.1207

 

carryselect(SCR)

7.5398

6.6597

6.4508

5.6207

carryselect(CLA)

8.43195

6.62185

 

 

 

carryselect(CLA)

6.96195

5.99185

 

 

condsum(CR)

 

13.1107

9.1928

7.1157

 

condsum(CR)

 

15.5637

12.5698

5.5607

condsum(SCR)

 

12.4797

8.2908

6.3607

 

condsum(SCR)

 

15.2797

11.9908

5.6607

condsum(CLA)

 

9.47085

6.28195

 

 

condsum(CLA)

 

12.1519

10.282

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

gen all signals

 

 

 

 

gen all signals

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

9.7159

7.9058

6.8769

6.3268

 

carryskip(CR)

10.6608

7.0538

6.4449

6.1048

carryskip(SCR)

12.1338

10.1237

8.6948

7.3447

 

carryskip(SCR)

9.1638

7.9937

6.9848

5.8447

carryskip(CLA)

20.0531

19.388

 

 

 

carryskip(CLA)

15.0832

14.3881

 

 

carryselect(CR)

9.7429

7.9184

6.8769

6.3268

 

carryselect(CR)

8.0383

7.061

6.4449

6.1048

carryselect(SCR)

9.3338

7.7237

7.0948

7.3447

 

carryselect(SCR)

7.7638

6.8837

6.6748

5.8447

carryselect(CLA)

9.10655

7.86345

 

 

 

carryselect(CLA)

7.66655

7.02345

 

 

condsum(CR)

 

16.3052

9.8434

6.3668

 

condsum(CR)

 

18.4165

13.4024

5.9258

condsum(SCR)

 

14.0477

8.9628

6.5847

 

condsum(SCR)

 

16.8477

12.6628

5.8847

condsum(CLA)

 

15.4641

10.6768

 

 

condsum(CLA)

 

18.4941

14.1887

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

19.2191

12.8266

11.0937

8.6644

 

carryskip(CR)

16.189

9.9305

8.5416

6.2463

carryskip(SCR)

17.2852

10.1237

8.6948

7.3447

 

carryskip(SCR)

15.1754

8.1417

7.1328

5.9927

carryskip(CLA)

22.8406

19.388

 

 

 

carryskip(CLA)

18.8705

14.579

 

 

carryselect(CR)

9.7285

7.913

7.26795

8.66545

 

carryselect(CR)

8.2374

7.7715

8.1746

6.24735

carryselect(SCR)

9.3338

7.7237

7.0948

7.3447

 

carryselect(SCR)

7.9118

7.0317

6.8228

5.9927

carryselect(CLA)

9.03155

7.78845

 

 

 

carryselect(CLA)

7.8885

7.1114

 

 

condsum(CR)

 

16.2421

10.0281

6.7568

 

condsum(CR)

 

18.5775

14.6034

6.2863

condsum(SCR)

 

14.4157

8.8868

6.5847

 

condsum(SCR)

 

16.9917

12.9588

6.0327

condsum(CLA)

 

14.0907

9.72165

 

 

condsum(CLA)

 

17.7805

14.4009

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

16.717

12.7848

10.9683

8.6644

 

carryskip(CR)

11.4803

9.1631

7.6906

5.5207

carryskip(SCR)

14.7095

10.1237

8.6948

7.3447

 

carryskip(SCR)

8.9398

7.7697

6.7608

5.6207

carryskip(CLA)

21.4383

19.388

 

 

 

carryskip(CLA)

15.6583

14.594

 

 

carryselect(CR)

9.7285

7.9112

7.26795

8.6644

 

carryselect(CR)

7.4452

6.8845

7.24865

5.5207

carryselect(SCR)

9.3338

7.7237

7.0948

7.3447

 

carryselect(SCR)

7.5398

6.6597

6.4508

5.6207

carryselect(CLA)

9.13855

7.78845

 

 

 

carryselect(CLA)

6.96195

5.99185

 

 

condsum(CR)

 

16.1351

9.4177

6.7568

 

condsum(CR)

 

17.6189

12.9926

5.5607

condsum(SCR)

 

14.2677

8.5148

6.5847

 

condsum(SCR)

 

16.7677

12.2148

5.6607

condsum(CLA)

 

13.6457

9.28395

 

 

condsum(CLA)

 

15.8366

11.9995

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 


 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

15.0667

13.4451

11.83

9.4425

 

carryskip(CR)

10.2534

9.1631

7.7742

5.5207

carryskip(SCR)

12.1976

10.2717

8.8428

7.4927

 

carryskip(SCR)

8.9398

7.7697

6.7608

5.6207

carryskip(CLA)

19.6474

19.462

 

 

 

carryskip(CLA)

14.6474

14.594

 

 

carryselect(CR)

9.4892

8.1073

8.0904

9.4425

 

carryselect(CR)

8.0413

7.0694

7.3147

5.5207

carryselect(SCR)

9.4818

7.8717

7.2428

7.4927

 

carryselect(SCR)

7.6538

6.8837

6.6748

5.6207

carryselect(CLA)

9.07875

7.91745

 

 

 

carryselect(CLA)

7.45855

6.5257

 

 

condsum(CR)

 

15.7946

10.3052

7.5767

 

condsum(CR)

 

17.4588

13.2063

5.5607

condsum(SCR)

 

14.5637

9.2588

6.7327

 

condsum(SCR)

 

16.4717

12.5868

5.6607

condsum(CLA)

 

13.2412

9.5691

 

 

condsum(CLA)

 

15.4474

12.0883

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

random

 

 

 

 

 

random

 

 

 

groupsize bit

2

4

8

16

 

groupsize bit

2

4

8

16

carryskip(CR)

20.8093

13.4999

11.2431

8.981

 

carryskip(CR)

17.942

9.1822

7.9844

6.0893

carryskip(SCR)

19.4366

11.5596

8.6948

7.3447

 

carryskip(SCR)

16.4366

8.35965

7.1328

5.9927

carryskip(CLA)

23.008

18.1214

 

 

 

carryskip(CLA)

20.2279

13.3274

 

 

carryselect(CR)

9.7303

7.913

7.58815

8.9828

 

carryselect(CR)

8.0156

7.2201

7.54245

6.0911

carryselect(SCR)

9.3338

7.7237

7.0948

7.3447

 

carryselect(SCR)

7.9118

7.0317

6.8228

5.9927

carryselect(CLA)

9.21355

8.03445

 

 

 

carryselect(CLA)

7.58975

6.87865

 

 

condsum(CR)

 

15.9208

10.1231

7.0734

 

condsum(CR)

 

18.6297

13.7164

5.9723

condsum(SCR)

 

14.4157

9.2588

6.5847

 

condsum(SCR)

 

17.5117

12.9588

6.0327

condsum(CLA)

 

15.0795

10.814

 

 

condsum(CLA)

 

17.9058

13.8891

 

 


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